Synopsys Completes World's First 3D IC PCIe Gen 6 Test Chip Signal Verification

Summary

Synopsys announced the successful completion of the world's first 3D IC PCIe Gen 6 test chip signal verification, with two face-to-face stacked chips achieving 64 GT/s PCIe connectivity, providing 128GB/s bandwidth via PAM4 signaling and 8-lane configuration. Compared to 2.5D heterogeneous integration, this technology further reduces chip interconnect distance, improving bandwidth, coupling, and efficiency. Synopsys noted that 3D PCIe connectivity introduces new challenges, and its 5nm PCIe Gen6 PHY test chip has been updated for this connection type.