Kirin 2026 Chip Transistor Density Soars 55%, Huawei's He Tingbo Updates Tao's Law Paper

Summary

Huawei engineer He Tingbo disclosed measured data for the Kirin 2026 chip in a preprint paper, which uses logic folding technology to increase transistor density from 155 million to 238 million per square millimeter, a 55% increase. At equivalent performance, NPU power consumption drops 66%, GPU 58%, and CPU big core 41%, with lower temperatures. The technology shortens signal routing, greatly reducing interconnect capacitance and power.